VHDL for Logic Synthesis – Case Study Code

In Chapter 15 of VHDL for Logic Synthesis (3rd edition) I work through a case study of a low-pass digital filter.

The source code for the filter is downloadable below:

This design is then reworked as a generic filter core which can then be used to implement the low-pass filter:


Excellent, I come from software and want to use FPGAs, I learned VHDL by myself doing tutorials, reading a lot of books, but always with fuzzy concepts.
And with this book I eventually understood that initial values are not synthesized and how templates are exactly synthesized.
The case studies are fine, great fun to simulate the systoles, now starting to play with the filter, very good starting point for less simple projects.

Leave a Reply